The scientific production pipeline¶

The SDD (Spec-Driven Development) pipeline applied to papers. Each phase has explicit inputs, outputs, and gates. If a gate fails, you don't advance — you diagnose and fix.

Fundamental rule

A paper is a REPORT of computational/experimental results, not a text essay. Without real data in data/processed/, there is no paper.

Full DAG¶

EXPLORE → PROPOSE → [SPEC ∥ DESIGN] → TASKS → COMPUTE → IMPLEMENT → VERIFY → FINALIZE → ARCHIVE

[SPEC ∥ DESIGN] run in parallel. VERIFY can loop back to IMPLEMENT (if structure) or COMPUTE (if data).

The 9 phases¶

1. EXPLORE¶

Targeted SSOT grep, Engram queries, novelty check (GATE). PROPOSE doesn't start without a novelty report. If the topic is DUPLICATE → 3 pivots to the user.

2. PROPOSE¶

A one-paragraph proposal: topic, unique contribution, target journal. Applies the Challenger Protocol (assumptions, counterargument, alternative). The scope defined here is immutable.

3. SPEC + DESIGN (parallel)¶

SPEC: defines quartile, journal, quality gates, min/max words, minimum refs, mandatory sections.
DESIGN: IMRaD outline, planned-figure mapping, ref-by-category mapping.

4. TASKS¶

Breaks IMPLEMENT into 4 atomic batches with acceptance criteria.

5. COMPUTE (sub-phases C0-C5.5)¶

The most critical phase. Without COMPUTE, IMPLEMENT is blocked.

Gate	What it does
C0	Inventory: deps + backend imports + valid SSOT
C1	Data acquisition (`fetch_domain_data.py --verify`)
C2	Solver execution → writes `data/processed/`
C3	Hardware emulator (optional, SKIP if `null`)
C4	Synthetic complement (optional, SKIP if `null`)
C5	Hard data gate: `COMPUTE_MANIFEST.json` with `all_design_sources_exist: true`
C5.5	Statistical preflight (Q1/Q2 pre-IMPLEMENT, F09): power ≥ 0.80, normality, homoscedasticity, effect size

The C5.5 preflight runs BEFORE writing anything (pre-registration mentality). Verdicts: VIABLE (unblocks) / UNDERPOWERED·VIOLATIONS·INSUFFICIENT (blocks).

6. IMPLEMENT (4 batches)¶

Golden rule

If a sentence says "the model produced X" and X is not in data/processed/, that sentence is a lie. The Verifier rejects it.

Pre-batch: Style Calibration (downloads 3-5 real venue papers, extracts patterns, saves a Style Card). Batches: B1 Methodology → B2 Results (Q1/Q2: error bars mandatory) → B3 Discussion → B4 Abstract+Intro+Refs.

7. VERIFY¶

Full validation + hostile peer-review simulation. Reviewer Simulator gates: Gate 0 (AI prose detection), Gate 0.90 (stats_engine validation), Gate 1 (traceability), Gate 2 (Q1/Q2 HARD BLOCK — CI/error bars, N, hypothesis test, effect size).

8. FINALIZE¶

Final PDF/PNG figures, PDF compilation (compile_paper.sh --template ieee), Reviewer Simulator pass, cover letter. No real figures + PDF + Reviewer pass → invalid ARCHIVE.

9. ARCHIVE¶

Merge delta specs, save lessons, close the cycle. Mandatory question to the user: submit / next paper / something else.

The publication ladder¶

Conference → Q4 → Q3 → Q2 → Q1

Each paper inherits from the previous one (data, structure, refs). No skipping levels. No planning Q4 while Conference is not in ARCHIVE.